BS

Bradley A. Sharpe-Geisler

LS Lattice Semiconductor: 5 patents #3 of 53Top 6%
📍 San Jose, CA: #99 of 2,756 inventorsTop 4%
🗺 California: #953 of 28,521 inventorsTop 4%
Overall (2003): #10,758 of 273,478Top 4%
5
Patents 2003

Issued Patents 2003

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
6657458 Output buffer with feedback from an input buffer to provide selectable PCL, GTL, or PECL compatibility 2003-12-02
6621298 Variable grain architecture for FPGA integrated circuits Om P. Agrawal, Herman M. Chang, Giap H. Tran 2003-09-16
6590415 Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources Om P. Agrawal, Herman M. Chang, Bai Nguyen, Giap H. Tran 2003-07-08
6531890 Programmable optimized-distribution logic allocator for a high-density complex PLD Om P. Agrawal, Nicholas A. Schmitz 2003-03-11
6526558 Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources Om P. Agrawal, Herman M. Chang, Bai Nguyen, Giap H. Tran 2003-02-25