SR

Sarathy Rajagopalan

Lsi Logic: 2 patents #67 of 465Top 15%
📍 Fremont, CA: #132 of 770 inventorsTop 20%
🗺 California: #4,287 of 28,521 inventorsTop 20%
Overall (2003): #44,312 of 273,478Top 20%
2
Patents 2003

Issued Patents 2003

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6586825 Dual chip in package with a wire bonded die mounted to a substrate Kishor Desai, Maniam Alagaratnam 2003-07-01
6518161 Method for manufacturing a dual chip in package with a flip chip die mounted on a wire bonded die Kishor Desai 2003-02-11