Issued Patents 2003
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6637016 | Assignment of cell coordinates | Andrej A. Zolotykh, Ivan Pavisic, Aiguo Lu | 2003-10-21 |
| 6637011 | Method and apparatus for quick search for identities applicable to specified formula | Andrej A. Zolotykh, Alexander S. Podkolzin, Valery B. Kudryavtsev | 2003-10-21 |
| 6629304 | Cell placement in integrated circuit chips to remove cell overlap, row overflow and optimal placement of dual height cells | Andrej A. Zolotykh, Aiguo Lu, Ivan Pavisic | 2003-09-30 |
| 6615401 | Blocked net buffer insertion | Valery B. Kudryavtsev, Andrey Nikitin | 2003-09-02 |
| 6564361 | Method and apparatus for timing driven resynthesis | Andrej A. Zolotykh, Alexander S. Podkolzin, Valery B. Kudryavtsev | 2003-05-13 |
| 6553551 | Timing recomputation | Andrej A. Zolotykh, Ivan Pavisic, Aiguo Lu | 2003-04-22 |
| 6550045 | Changing clock delays in an integrated circuit for skew optimization | Aiguo Lu, Ivan Pavisic, Andrej A. Zolotykj | 2003-04-15 |
| 6550044 | Method in integrating clock tree synthesis and timing optimization for an integrated circuit design | Ivan Pavisic, Aiguo Lu, Andrej A. Zolotykh | 2003-04-15 |
| 6543032 | Method and apparatus for local resynthesis of logic trees with multiple cost functions | Andrej A. Zolotykh, Alexander S. Podkolzin, Valery B. Kudryavtsev | 2003-04-01 |
| 6532582 | Method and apparatus for optimal critical netlist area selection | Andrej A. Zolotykh, Alexander S. Podkolzin, Valery B. Kudryavtsev | 2003-03-11 |
| 6513148 | Density driven assignment of coordinates | Andre J. Zolotykh, Youri P. Postelga | 2003-01-28 |