Issued Patents 2003
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6664173 | Hardmask gate patterning technique for all transistors using spacer gate approach for critical dimension control | Brian S. Doyle, Mark L. Doczy | 2003-12-16 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6664173 | Hardmask gate patterning technique for all transistors using spacer gate approach for critical dimension control | Brian S. Doyle, Mark L. Doczy | 2003-12-16 |