Issued Patents 2003
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6660578 | High-K dielectric having barrier layer for P-doped devices and method of fabrication | Olov Karlsson, Qi Xiang, Haihong Wang, Bin Yu | 2003-12-09 |
| 6657276 | Shallow trench isolation (STI) region with high-K liner and method of formation | Olov Karlsson, Haihong Wang, Bin Yu, Qi Xiang | 2003-12-02 |
| 6639271 | Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same | Wei Zheng, Mark Randolph, Nicholas H. Tripsas, Jack F. Thomas, Mark T. Ramsbey | 2003-10-28 |
| 6623803 | Copper interconnect stamping | — | 2003-09-23 |
| 6605843 | Fully depleted SOI device with tungsten damascene contacts and method of forming same | Allison Holbrook, Sunny Cherian, Kai Yang | 2003-08-12 |
| 6599824 | System for and method of forming local interconnect using microcontact printing | — | 2003-07-29 |
| 6599831 | Metal gate electrode using silicidation and method of formation thereof | Witold P. Maszara | 2003-07-29 |
| 6596598 | T-shaped gate device and method for making | Shekhar Pramanick, Sunny Cherian | 2003-07-22 |
| 6589823 | Silicon-on-insulator (SOI)electrostatic discharge (ESD) protection device with backside contact plug | Stephen G. Beebe, Srinath Krishnan | 2003-07-08 |
| 6586755 | Feed-forward control of TCI doping for improving mass-production-wise statistical distribution of critical performance parameters in semiconductor devices | William D. Heavlin | 2003-07-01 |
| 6579750 | Manufacturing method for fully depleted silicon on insulator semiconductor device | — | 2003-06-17 |
| 6567717 | Feed-forward control of TCI doping for improving mass-production-wise, statistical distribution of critical performance parameters in semiconductor devices | William D. Heavlin | 2003-05-20 |
| 6566680 | Semiconductor-on-insulator (SOI) tunneling junction transistor | — | 2003-05-20 |
| 6555879 | SOI device with metal source/drain and method of fabrication | Qi Xiang, Bin Yu | 2003-04-29 |
| 6544905 | Metal gate trim process by using self assembled monolayers | — | 2003-04-08 |
| 6541821 | SOI device with source/drain extensions and adjacent shallow pockets | Srinath Krishnan, Witold P. Maszara | 2003-04-01 |
| 6537920 | Formation of vertical transistors using block copolymer lithography | — | 2003-03-25 |
| 6534399 | Dual damascene process using self-assembled monolayer | — | 2003-03-18 |
| 6528858 | MOSFETs with differing gate dielectrics and method of formation | Bin Yu, Qi Xiang, Olov Karlsson, Haihong Wang | 2003-03-04 |
| 6512273 | Method and structure for improving hot carrier immunity for devices with very shallow junctions | Ognjen Milic, Sunny Cherian | 2003-01-28 |
| 6509234 | Method of fabricating an ultra-thin fully depleted SOI device with T-shaped gate | — | 2003-01-21 |