CH

Chia-Ta Hsieh

TSMC: 17 patents #4 of 614Top 1%
📍 Tainan, TW: #1 of 212 inventorsTop 1%
Overall (2002): #429 of 266,432Top 1%
17
Patents 2002

Issued Patents 2002

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDate
6483159 Undoped polysilicon as the floating-gate of a split-gate flash cell Yai-Fen Lin, Hung-Cheng Sung, Juang-Ke Yeh, Di-Son Kuo 2002-11-19
6479859 Split gate flash memory with multiple self-alignments Tai-Fen Lin, Wen-Ting Chu, Chuang-Ke Yeh, Hung-Cheng Sung, Di-Son Kuo 2002-11-12
6468863 Split gate field effect transistor (FET) device employing dielectric barrier layer and method for fabrication thereof Di-Son Kuo, Jake Yeh, Chuan-Li Chang, Wen-Ting Chu, Sheng-Wei Tsaur 2002-10-22
6465841 Split gate flash memory device having nitride spacer to prevent inter-poly oxide damage Yai-Fen Lin, Hung-Cheng Sung, Jack Y. Yeh, Di-Son Kuo 2002-10-15
6465836 Vertical split gate field effect transistor (FET) device Chrong-Jung Lin, Sheng-Wei Tsao, Di-Son Kuo, Jack Y. Yeh, Wen-Ting Chu +1 more 2002-10-15
6441429 Split-gate flash memory device having floating gate electrode with sharp peak Hung-Cheng Sung, Yai-Fen Lin, Di-Son Kuo 2002-08-27
6420233 Split gate field effect transistor (FET) device employing non-linear polysilicon floating gate electrode dopant profile Di-Son Kuo, Jake Yeh, Chung-Li Chang, Wen-Ting Chu, Chrong-Jung Lin 2002-07-16
6417049 Split gate flash cell for multiple storage Hung-Cheng Sung, Di-Son Kuo, Yai-Fen Lin 2002-07-09
6410957 Method of forming poly tip to improve erasing and programming speed in split gate flash Di-Son Kuo, Yai-Fen Lin, Hung-Cheng Sung 2002-06-25
6403494 Method of forming a floating gate self-aligned to STI on EEPROM Wen-Ting Chu, Di-Son Kuo, Jack Y. Yeh, Chuan-Li Chang 2002-06-11
6396112 Method of fabricating buried source to shrink chip size in memory array Jenn Tsao, Di-Son Kuo, Yai-Fen Lin, Hung-Cheng Sung 2002-05-28
6385089 Split-gate flash cell for virtual ground architecture Hung-Cheng Sung, Din-Son Kuo, Yai-Fen Lin 2002-05-07
6380583 Method to increase coupling ratio of source to floating gate in split-gate flash Yai-Fen Lin, Di-Son Kuo, Hung-Cheng Sung, Jack Y. Yeh 2002-04-30
6380035 Poly tip formation and self-align source process for split-gate flash cell Hung-Cheng Sung, Di-Son Kuo, Yai-Fen Lin 2002-04-30
6358796 Method to fabricate a non-smiling effect structure in split-gate flash with self-aligned isolation Yai-Fen Lin, Chang-Song Lin, Hung-Cheng Sung, Juang-Ke Yeh 2002-03-19
6355527 Method to increase coupling ratio of source to floating gate in split-gate flash Yai-Fen Lin, Hung-Cheng Sung, Jack Y. Yeh, Di-Son Kuo 2002-03-12
6344997 Split-gate flash cell for virtual ground architecture Hung-Cheng Sung, Din-Son Kuo, Yai-Fen Lin 2002-02-05