Issued Patents 2002
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6495880 | Method to fabricate a flash memory cell with a planar stacked gate | Chrong-Jung Lin, Jong Chen, Di-Son Kuo | 2002-12-17 |
| 6444511 | CMOS output circuit with enhanced ESD protection using drain side implantation | Yi-Hsu Wu, Jian-Hsing Lee, Boon-Khim Liew | 2002-09-03 |
| 6414532 | Gate ground circuit approach for I/O ESD protection | Jian-Hsing Lee, Yi-Hsun Wu, Mau-Lin Wu | 2002-07-02 |
| 6348382 | Integration process to increase high voltage breakdown performance | Chrong-Jung Lin, Jong Chen, Wen-Ting Chu | 2002-02-19 |