Issued Patents 2002
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6502224 | Method and apparatus for synthesizing levelized logic | Harm Peter Hofstee, Stephen Douglas Posluszny, Joel A. Silberman, Osamu Takahashi, Dieter Wendel | 2002-12-31 |
| 6453390 | Processor cycle time independent pipeline cache and method for pipelining data from a cache | Naoaki Aoki, Nobuo Kojima, Joel A. Silberman | 2002-09-17 |
| 6453258 | Optimized burn-in for fixed time dynamic logic circuitry | Naoaki Aoki, Joel A. Silberman, Osamu Takahashi | 2002-09-17 |
| 6430672 | Method for performing address mapping using two lookup tables | Harm Peter Hofstee, Osamu Takahashi, Jan Van Lunteren | 2002-08-06 |
| 6421699 | Method and system for a speedup of a bit multiplier | Perng Shyong Lin, Joel A. Silberman | 2002-07-16 |
| 6404689 | Method and structure for hiding a refresh operation in a DRAM having an interlocked pipeline | Toshiaki Kirihata, Chorng-Lii Hwang | 2002-06-11 |
| 6393446 | 32-bit and 64-bit dual mode rotator | Hung C. Ngo, Jaehong Park, Joel A. Silberman | 2002-05-21 |
| 6360238 | Leading zero/one anticipator having an integrated sign selector | Kyung Tek Lee, Hung C. Ngo, Kevin John Nowka | 2002-03-19 |
| 6356990 | Set-associative cache memory having a built-in set prediction array | Naoaki Aoki, Nobuo Kojima, Joel A. Silberman | 2002-03-12 |
| 6345286 | 6-to-3 carry-save adder | Hung C. Ngo, Kevin John Nowka | 2002-02-05 |