Issued Patents 2002
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6492856 | Edge triggered latch with symmetrical paths from clock to data outputs | Huajun Wen | 2002-12-10 |
| 6453390 | Processor cycle time independent pipeline cache and method for pipelining data from a cache | Naoaki Aoki, Sang Hoo Dhong, Joel A. Silberman | 2002-09-17 |
| 6445217 | Edge-triggered latch with balanced pass-transistor logic trigger | Kevin John Nowka, Huajun Wen | 2002-09-03 |
| 6437624 | Edge-triggered latch with symmetric complementary pass-transistor logic data path | Huajun Wen | 2002-08-20 |
| 6437625 | Edge triggered latch with symmetrical paths from clock to data outputs | Huajun Wen | 2002-08-20 |
| 6356990 | Set-associative cache memory having a built-in set prediction array | Naoaki Aoki, Sang Hoo Dhong, Joel A. Silberman | 2002-03-12 |