Issued Patents 2002
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6502171 | Multiprocessor system bus with combined snoop responses explicitly informing snoopers to scarf data | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2002-12-31 |
| 6496921 | Layered speculative request unit with instruction optimized and storage hierarchy optimized partitions | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, James Stephen Fields, Jr. | 2002-12-17 |
| 6493779 | Method and system for interrupt handling using device pipelined packet transfers | Richard Allen Kelley, Danny Marvin Neal, Steven M. Thurber | 2002-12-10 |
| 6487637 | Method and system for clearing dependent speculations from a request queue | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, William J. Starke | 2002-11-26 |
| 6484241 | Multiprocessor computer system with sectored cache line system bus protocol mechanism | Ravi Kumar Arimilli, John Steven Dodson | 2002-11-19 |
| 6477613 | Cache index based system address bus | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2002-11-05 |
| 6477637 | Method and apparatus for transporting store requests between functional units within a processor | Ravi Kumar Arimilli, Robert Alan Cargnoni | 2002-11-05 |
| 6470427 | Programmable agent and method for managing prefetch queues | Ravi Kumar Arimilli, John Steven Dodson, James Stephen Fields, Jr. | 2002-10-22 |
| 6470442 | Processor assigning data to hardware partition based on selectable hash of data address | Ravi Kumar Arimilli, Leo James Clark, John S. Dodson, Jerry Don Lewis | 2002-10-22 |
| 6463507 | Layered local cache with lower level cache updating upper and lower level cache directories | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson | 2002-10-08 |
| 6460117 | Set-associative cache memory having a mechanism for migrating a most recently used set | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, James Stephen Fields, Jr. | 2002-10-01 |
| 6460118 | Set-associative cache memory having incremental access latencies among sets | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, James Stephen Fields, Jr. | 2002-10-01 |
| 6449691 | Asymmetrical cache properties within a hashed storage subsystem | Ravi Kumar Arimilli, Leo James Clark, John S. Dodson, Jerry Don Lewis | 2002-09-10 |
| 6446165 | Address dependent caching behavior within a data processing system having HSA (hashed storage architecture) | Ravi Kumar Arimilli, Leo James Clark, John S. Dodson, Jerry Don Lewis | 2002-09-03 |
| 6446166 | Method for upper level cache victim selection management by a lower level cache | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson | 2002-09-03 |
| 6438656 | Method and system for cancelling speculative cache prefetch requests | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, William J. Starke | 2002-08-20 |
| 6434670 | Method and apparatus for efficiently managing caches with non-power-of-two congruence classes | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson | 2002-08-13 |
| 6434667 | Layered local cache with imprecise reload mechanism | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson | 2002-08-13 |
| 6421763 | Method for instruction extensions for a tightly coupled speculative request unit | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, James Stephen Fields, Jr. | 2002-07-16 |
| 6421762 | Cache allocation policy based on speculative request history | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, James Stephen Fields, Jr. | 2002-07-16 |
| 6418497 | Method and system for interrupt handling using system pipelined packet transfers | Richard Allen Kelley, Danny Marvin Neal, Steven M. Thurber | 2002-07-09 |
| 6418513 | Queue-less and state-less layered local data cache mechanism | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson | 2002-07-09 |
| 6418516 | Method and system for managing speculative requests in a multi-level memory hierarchy | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, William J. Starke | 2002-07-09 |
| 6405289 | Multiprocessor system in which a cache serving as a highest point of coherency is indicated by a snoop response | Ravi Kumar Arimilli, Leo James Clark, James Stephen Fields, Jr. | 2002-06-11 |
| 6405285 | Layered local cache mechanism with split register load bus and cache load bus | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson | 2002-06-11 |