Issued Patents 2002
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6493814 | Reducing resource collisions associated with memory units in a multi-level hierarchy memory system | James Stephen Fields, Jr., Jody B. Joyner, Jeffrey A. Stuecheli | 2002-12-10 |
| 6487637 | Method and system for clearing dependent speculations from a request queue | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie | 2002-11-26 |
| 6438656 | Method and system for cancelling speculative cache prefetch requests | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie | 2002-08-20 |
| 6430656 | Cache and management method using combined software and hardware congruence class selectors | Ravi Kumar Arimilli, Bryan Hunt | 2002-08-06 |
| 6421761 | Partitioned cache and management method for selectively caching data by type | Ravi Kumar Arimilli, Bryan Hunt | 2002-07-16 |
| 6418516 | Method and system for managing speculative requests in a multi-level memory hierarchy | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie | 2002-07-09 |
| 6385702 | High performance multiprocessor system with exclusive-deallocate cache state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-05-07 |
| 6374333 | Cache coherency protocol in which a load instruction hint bit is employed to indicate deallocation of a modified cache line supplied by intervention | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-04-16 |
| 6349369 | Protocol for transferring modified-unsolicited state during data intervention | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-02-19 |
| 6345342 | Cache coherency protocol employing a read operation including a programmable flag to indicate deallocation of an intervened cache line | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-02-05 |
| 6345344 | Cache allocation mechanism for modified-unsolicited cache state that modifies victimization priority bits | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-02-05 |
| 6345343 | Multiprocessor system bus protocol with command and snoop responses for modified-unsolicited cache state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie | 2002-02-05 |