RP

Robert J. Palermo

CS Cadence Design Systems: 1 patents #6 of 34Top 20%
📍 Johnson City, TN: #6 of 29 inventorsTop 25%
🗺 Tennessee: #354 of 1,455 inventorsTop 25%
Overall (2002): #126,778 of 266,432Top 50%
1
Patents 2002

Issued Patents 2002

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6442739 System and method for timing abstraction of digital logic circuits Karem A. Sakallah, Shekaripuram V. Venkatesh, Mohammad Mortazavi 2002-08-27