MM

Mohammad Mortazavi

CS Cadence Design Systems: 2 patents #1 of 34Top 3%
🗺 California: #3,859 of 26,763 inventorsTop 15%
Overall (2002): #49,064 of 266,432Top 20%
2
Patents 2002

Issued Patents 2002

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6457159 Functional timing analysis for characterization of virtual component blocks Hakan Yalcin, Robert J. Palmero, Karem A. Sakallah, Cyrus Bamji 2002-09-24
6442739 System and method for timing abstraction of digital logic circuits Robert J. Palermo, Karem A. Sakallah, Shekaripuram V. Venkatesh 2002-08-27