Issued Patents 2002
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6473832 | Load/store unit having pre-cache and post-cache queues for low latency load memory operations | Hebbalalu S. Ramagopal, William Kurt Lewchuk | 2002-10-29 |
| 6473849 | Implementing locks in a distributed processing system | James B. Keller | 2002-10-29 |
| 6473837 | Snoop resynchronization mechanism to preserve read ordering | Hebbalalu S. Ramagopal, Derrick R. Meyer, Stephen M. Conor | 2002-10-29 |
| 6446189 | Computer system including a novel address translation mechanism | Gerald D. Zuraski, Jr., Frederick Daniel Weber, William Kurt Lewchuk, Scott White, Michael T. Clark | 2002-09-03 |
| 6427193 | Deadlock avoidance using exponential backoff | Derrick R. Meyer | 2002-07-30 |
| 6415360 | Minimizing self-modifying code checks for uncacheable memory types | William Kurt Lewchuk, Gerald D. Zuraski, Jr. | 2002-07-02 |
| 6393536 | Load/store unit employing last-in-buffer indication for rapid load-hit-store | James Roberts | 2002-05-21 |
| 6370600 | Staging buffer for translating clock domains when source clock frequency exceeds target clock frequency | Larry D. Hewitt | 2002-04-09 |