Issued Patents 1997
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5701431 | Method and system for randomly selecting a cache set for cache fill operations | — | 1997-12-23 |
| 5699552 | System for improved processor throughput with enhanced cache utilization using specialized interleaving operations | — | 1997-12-16 |
| 5689680 | Cache memory system and method for accessing a coincident cache with a bit-sliced architecture | David Kalish, Saul Barajas | 1997-11-18 |
| 5687348 | Variable-depth, self-regulating cache queue flushing system | — | 1997-11-11 |
| 5666513 | Automatic reconfiguration of multiple-way cache system allowing uninterrupted continuing processor operation | — | 1997-09-09 |
| 5642486 | "Invalidation queue with ""bit-sliceability""" | David Kalish, Saul Barajas | 1997-06-24 |
| 5640531 | Enhanced computer operational system using auxiliary mini-cache for enhancement to general cache | Leland E. Watson | 1997-06-17 |
| 5598551 | Cache invalidation sequence system utilizing odd and even invalidation queues with shorter invalidation cycles | Saul Barajas, David Kalish, Keith S. Saldanha | 1997-01-28 |