Issued Patents 1997
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5689432 | Integrated circuit design and manufacturing method and an apparatus for designing an integrated circuit in accordance with the method | Robert L. Maziasz, Joseph W. Norton, Larry G. Jones, Mohankumar Guruswamy | 1997-11-18 |
| 5666288 | Method and apparatus for designing an integrated circuit | Larry G. Jones, Robert L. Maziasz, Mohan Guruswamy | 1997-09-09 |
| 5619418 | Logic gate size optimization process for an integrated circuit whereby circuit speed is improved while circuit area is optimized | Joseph W. Norton, Larry G. Jones, Susanta Misra, R. Iris Bahar | 1997-04-08 |