WS

William Wu Shen

IBM: 1 patents #1,061 of 3,557Top 30%
📍 Taipei, CA: #18 of 39 inventorsTop 50%
Overall (1997): #59,024 of 185,788Top 35%
1
Patents 1997

Issued Patents 1997

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
5691996 Memory implemented error detection and correction code with address parity bits Chin-Long Chen, Mu-Yue Hsiao, Walter Lipponer 1997-11-25