Issued Patents 1997
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5691996 | Memory implemented error detection and correction code with address parity bits | Mu-Yue Hsiao, Walter Lipponer, William Wu Shen | 1997-11-25 |
| 5682394 | Fault tolerant computer memory systems and components employing dual level error correction and detection with disablement feature | Robert M. Blake, Douglas Craig Bossen, John A. Fifield, Howard L. Kalter | 1997-10-28 |
| 5631915 | Method of correcting single errors | Patrick J. Meaney | 1997-05-20 |
| 5600659 | Low cost symbol error correction coding and decoding | — | 1997-02-04 |