Issued Patents 1997
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5675168 | Unsymmetrical MOS device having a gate insulator area offset from the source and drain areas, and ESD protection circuit including such a MOS device | Kyoji Yamashita, Kazumi Kurimoto, Akira Hiroki, Isao Miyanaga, Atsushi Hori | 1997-10-07 |
| 5633211 | Semiconductor device and process | Shinichi Imai, Yuka Terai, Masanori Fukumoto, Kousaku Yano, Hiroyuki Umimoto +1 more | 1997-05-27 |
| 5610430 | Semiconductor device having reduced gate overlapping capacitance | Kyoji Yamashita, Kazumi Kurimoto, Hiroyuki Umimoto | 1997-03-11 |