SC

Steve J. Ciavaglia

SG Silicon Graphics: 1 patents #16 of 66Top 25%
📍 Williston, VT: #10 of 24 inventorsTop 45%
🗺 Vermont: #110 of 373 inventorsTop 30%
Overall (1997): #75,952 of 185,788Top 45%
1
Patents 1997

Issued Patents 1997

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
5632025 Method for preventing multi-level cache system deadlock in a multi-processor system Joseph P. Bratt, John Brennan, Peter Hsu, William A. Huffman, Joseph T. Scanlon 1997-05-20