JB

Joseph P. Bratt

SG Silicon Graphics: 1 patents #16 of 66Top 25%
📍 San Jose, CA: #403 of 1,308 inventorsTop 35%
🗺 California: #4,598 of 17,285 inventorsTop 30%
Overall (1997): #130,423 of 185,788Top 75%
1
Patents 1997

Issued Patents 1997

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
5632025 Method for preventing multi-level cache system deadlock in a multi-processor system John Brennan, Peter Hsu, William A. Huffman, Joseph T. Scanlon, Steve J. Ciavaglia 1997-05-20