Issued Patents 1997
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5700716 | Method for forming low contact resistance contacts, vias, and plugs with diffusion barriers | Varatharajan Nagabushnam | 1997-12-23 |
| 5677573 | Field effect transistor | Kirk D. Prall, Pai-Hung Pan | 1997-10-14 |
| 5664988 | Process of polishing a semiconductor wafer having an orientation edge discontinuity shape | Hugh E. Stroupe, Gurtej S. Sandhu | 1997-09-09 |
| 5644166 | Sacrificial CVD germanium layer for formation of high aspect ratio submicron VLSI contacts | Jeffrey W. Honeycutt | 1997-07-01 |
| 5637518 | Method of making a field effect transistor having an elevated source and an elevated drain | Kirk D. Prall, Pai-Hung Pan | 1997-06-10 |