TL

Teh-Kuin Lee

Lsi Logic: 5 patents #9 of 157Top 6%
📍 San Jose, CA: #27 of 1,308 inventorsTop 3%
🗺 California: #313 of 17,285 inventorsTop 2%
Overall (1997): #3,256 of 185,788Top 2%
5
Patents 1997

Issued Patents 1997

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
5698873 High density gate array base cell architecture Michael J. Colwell 1997-12-16
5691218 Method of fabricating a programmable polysilicon gate array base cell structure Michael J. Colwell, Jane C.T. Chiu, Abraham Yee, Stanley Yeh, Gobi R. Padmanabhan 1997-11-25
5686855 Process monitor for CMOS integrated circuits 1997-11-11
5650740 TTL delay matching circuit 1997-07-22
5631596 Process monitor for CMOS integrated circuits Nicholas Sporck 1997-05-20