DB

Douglas B. Boyle

Lsi Logic: 3 patents #22 of 157Top 15%
📍 Palo Alto, CA: #34 of 547 inventorsTop 7%
🗺 California: #921 of 17,285 inventorsTop 6%
Overall (1997): #16,939 of 185,788Top 10%
3
Patents 1997

Issued Patents 1997

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
5682322 Optimization processing for integrated circuit physical design automation system using chaotic fitness improvement method James S. Koford, Ranko Scepanovic, Edwin R. Jones, Michael D. Rostoker 1997-10-28
5636125 Computer implemented method for producing optimized cell placement for integrated circiut chip Michael D. Rostoker, James S. Koford, Edwin R. Jones, Ranko Scepanovic 1997-06-03
5619419 Method of cell placement for an itegrated circuit chip comprising integrated placement and cell overlap removal Patrik D'haeseleer 1997-04-08