PD

Patrik D'haeseleer

Lsi Logic: 2 patents #36 of 157Top 25%
📍 Atherton, CA: #7 of 41 inventorsTop 20%
🗺 California: #1,869 of 17,285 inventorsTop 15%
Overall (1997): #28,165 of 185,788Top 20%
2
Patents 1997

Issued Patents 1997

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
5638293 Optimal pad location method for microelectronic circuit cell placement Ranko Scepanovic 1997-06-10
5619419 Method of cell placement for an itegrated circuit chip comprising integrated placement and cell overlap removal Douglas B. Boyle 1997-04-08