Issued Patents 1997
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5699550 | Computer system cache performance on write allocation cycles by immediately setting the modified bit true | — | 1997-12-16 |
| 5640532 | Microprocessor cache memory way prediction based on the way of previous memory read | Gary W. Thome | 1997-06-17 |
| 5634073 | System having a plurality of posting queues associated with different types of write operations for selectively checking one queue based upon type of read operation | Michael J. Collins, Gary W. Thome, Michael Moriarty, John E. Larson | 1997-05-27 |