Issued Patents 1997
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5692154 | Circuit for masking a dirty status indication provided by a cache dirty memory under certain conditions so that a cache memory controller properly controls a cache tag memory | Brian B. Tucker | 1997-11-25 |
| 5664225 | Circuit for disabling an address masking control signal when a microprocessor is in a system management mode | Basem Abu Ayash | 1997-09-02 |
| 5652856 | Memory controller having all DRAM address and control singals provided synchronously from a single device | Paul Santeler | 1997-07-29 |
| 5651130 | Memory controller that dynamically predicts page misses | Lee B. Hinkle, Paul Santeler, David R. Wooten, Jr., John A. Landry | 1997-07-22 |
| 5640532 | Microprocessor cache memory way prediction based on the way of previous memory read | Jens K. Ramsey | 1997-06-17 |
| 5634112 | Memory controller having precharge prediction based on processor and PCI bus cycles | Michael Moriarty, John E. Larson | 1997-05-27 |
| 5634073 | System having a plurality of posting queues associated with different types of write operations for selectively checking one queue based upon type of read operation | Michael J. Collins, Michael Moriarty, Jens K. Ramsey, John E. Larson | 1997-05-27 |
| 5604884 | Burst SRAMS for use with a high speed clock | Michael J. Collins | 1997-02-18 |
| 5596741 | Computer system which overrides write protection status during execution in system management mode | — | 1997-01-21 |