Issued Patents 1997
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5700698 | Method for screening non-volatile memory and programmable logic devices | Radu Barsan | 1997-12-23 |
| 5666309 | Memory cell for a programmable logic device (PLD) avoiding pumping programming voltage above an NMOS threshold | Jack Peng, Chris Schmidt | 1997-09-09 |
| 5646901 | CMOS memory cell with tunneling during program and erase through the NMOS and PMOS transistors and a pass gate separating the NMOS and PMOS transistors | Bradley A. Sharpe-Geisler, Radu Barsan | 1997-07-08 |
| 5615150 | Control gate-addressed CMOS non-volatile cell that programs through gates of CMOS transistors | Radu Barsan | 1997-03-25 |
| 5604370 | Field implant for semiconductor device | Sunil Mehta | 1997-02-18 |
| 5596524 | CMOS memory cell with gate oxide of both NMOS and PMOS transistors as tunneling window for program and erase | Bradley A. Sharpe-Geisler | 1997-01-21 |
| 5594687 | Completely complementary MOS memory cell with tunneling through the NMOS and PMOS transistors during program and erase | Radu Barsan, Bradley A. Sharpe-Geisler | 1997-01-14 |