Issued Patents 1997
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5700698 | Method for screening non-volatile memory and programmable logic devices | Jonathan Lin | 1997-12-23 |
| 5672521 | Method of forming multiple gate oxide thicknesses on a wafer substrate | Xiao-Yu Li, Sunil Mehta | 1997-09-30 |
| 5646901 | CMOS memory cell with tunneling during program and erase through the NMOS and PMOS transistors and a pass gate separating the NMOS and PMOS transistors | Bradley A. Sharpe-Geisler, Jonathan Lin | 1997-07-08 |
| 5615150 | Control gate-addressed CMOS non-volatile cell that programs through gates of CMOS transistors | Jonathan Lin | 1997-03-25 |
| 5594687 | Completely complementary MOS memory cell with tunneling through the NMOS and PMOS transistors during program and erase | Jonathan Lin, Bradley A. Sharpe-Geisler | 1997-01-14 |