Issued Patents All Time
Showing 76–100 of 127 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5490099 | Method of multiplying an analog value by a digital value | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1996-02-06 |
| 5477483 | Memory device | Guoliang Shou, Makoto Yamamoto | 1995-12-19 |
| 5471161 | Circuit for calculating the minimum value | Guoliang Shou, Weikang Yang, Wiwat Wongwarawipat, Makoto Yamamoto | 1995-11-28 |
| 5469102 | Capacitive coupled summing circuit with signed output | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1995-11-21 |
| 5467376 | Incrementing and decrementing counter circuits | Guoliang Shou, Makoto Yamamoto | 1995-11-14 |
| 5467030 | Circuit for calculating a maximum value | Guoliang Shou, Weikang Yang, Wiwat Wongwarawipat, Makoto Yamamoto | 1995-11-14 |
| 5465064 | Weighted summing circuit | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1995-11-07 |
| 5463717 | Inductively coupled neural network | Ryohei Kumagai, Koji Matsumoto, Makoto Yamamoto | 1995-10-31 |
| 5457417 | Scaler circuit | Shou Guoliang, Weikang Yang, Makoto Yamamoto | 1995-10-10 |
| 5455581 | Digital-to-analog converter employing a common trigger and reference signal | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1995-10-03 |
| 5452373 | Image verification method | Guoliang Shou, Makoto Yamamoto | 1995-09-19 |
| 5452336 | Memory device for recording a time factor | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1995-09-19 |
| 5450023 | Interface circuit using a limited number of pins in LSI applications | Weikang Yang, Guoliang Shou, Makoto Yamamoto | 1995-09-12 |
| 5440605 | Multiplication circuit | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1995-08-08 |
| 5440156 | Metal oxide semiconductor field effect transistor cell adaptable for use in an integrator | Guoliang Shou, Weikang Yang, Wiwat Wongwirawipat, Makoto Yamamoto | 1995-08-08 |
| 5434529 | Signal integration circuit | Gouliang Shou, Makoto Yamamoto | 1995-07-18 |
| 5430829 | Learning method for a data processing system | Makoto Yamamoto | 1995-07-04 |
| 5424965 | Multiplication circuit for multiplying analog values | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1995-06-13 |
| 5424973 | Apparatus and method for performing small scale subtraction | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1995-06-13 |
| 5420807 | Multiplication circuit for multiplying analog inputs by digital inputs | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1995-05-30 |
| 5420806 | Multiplication circuit for multiplying analog signals by digital signals | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1995-05-30 |
| 5416370 | Multiplication circuit | Makoto Yamamoto | 1995-05-16 |
| 5416850 | Associative pattern conversion system and adaption method thereof | Ryohei Kumagai, Makoto Yamamoto | 1995-05-16 |
| 5416439 | Analog calculating | Guoliang Shou, Weikang Yang, Makoto Yamamoto | 1995-05-16 |
| 5408422 | Multiplication circuit capable of directly multiplying digital data with analog data | Makoto Yamamoto | 1995-04-18 |