Issued Patents All Time
Showing 25 most recent of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5604458 | Scaler circuit | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1997-02-18 |
| 5532580 | Circuit for weighted addition | Guoliang Shu, Wiwat Wongwarawipat, Makoto Yamamoto | 1996-07-02 |
| 5500810 | Filter device with memory test circuit | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1996-03-19 |
| 5495192 | Sample hold circuit | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1996-02-27 |
| 5490099 | Method of multiplying an analog value by a digital value | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1996-02-06 |
| 5479577 | Neural device | — | 1995-12-26 |
| 5471161 | Circuit for calculating the minimum value | Guoliang Shou, Wiwat Wongwarawipat, Sunao Takatori, Makoto Yamamoto | 1995-11-28 |
| 5469102 | Capacitive coupled summing circuit with signed output | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-11-21 |
| 5467030 | Circuit for calculating a maximum value | Guoliang Shou, Wiwat Wongwarawipat, Sunao Takatori, Makoto Yamamoto | 1995-11-14 |
| 5465064 | Weighted summing circuit | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-11-07 |
| 5457417 | Scaler circuit | Shou Guoliang, Sunao Takatori, Makoto Yamamoto | 1995-10-10 |
| 5455581 | Digital-to-analog converter employing a common trigger and reference signal | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-10-03 |
| 5452336 | Memory device for recording a time factor | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-09-19 |
| 5450023 | Interface circuit using a limited number of pins in LSI applications | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-09-12 |
| 5440156 | Metal oxide semiconductor field effect transistor cell adaptable for use in an integrator | Guoliang Shou, Wiwat Wongwirawipat, Sunao Takatori, Makoto Yamamoto | 1995-08-08 |
| 5440605 | Multiplication circuit | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-08-08 |
| 5424973 | Apparatus and method for performing small scale subtraction | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-06-13 |
| 5424965 | Multiplication circuit for multiplying analog values | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-06-13 |
| 5420806 | Multiplication circuit for multiplying analog signals by digital signals | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-05-30 |
| 5420807 | Multiplication circuit for multiplying analog inputs by digital inputs | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-05-30 |
| 5416439 | Analog calculating | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-05-16 |
| 5414666 | Memory control device | Ryohei Kumagai | 1995-05-09 |
| 5406131 | Exponential circuit | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-04-11 |
| 5396442 | Multiplication circuit for multiplying analog inputs by digital inputs | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-03-07 |
| 5396446 | Digital filter circuit that minimizes holding errors transmitted between holding circuits | Guoliang Shou, Sunao Takatori, Makoto Yamamoto | 1995-03-07 |