Issued Patents All Time
Showing 151–175 of 253 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5550949 | Method for compressing voice data by dividing extracted voice frequency domain parameters by weighting values | Sunao Takatori | 1996-08-27 |
| 5550950 | Voice transfer system with low-error voice signal regeneration | Sunao Takatori | 1996-08-27 |
| 5537348 | Memory device | Guoliang Shou, Sunao Takatori | 1996-07-16 |
| 5532580 | Circuit for weighted addition | Guoliang Shu, Weikang Yang, Wiwat Wongwarawipat | 1996-07-02 |
| 5528700 | Character recognition system based on a neural network | Sunao Takatori | 1996-06-18 |
| 5521543 | Averaging circuit | Guoliang Shou, Sunao Takatori | 1996-05-28 |
| 5506915 | Associative pattern conversion system and adaptation method thereof | Sunao Takstori, Ryohei Kumagai | 1996-04-09 |
| 5502664 | Filter device including SRAM and EEPROM devices | Guoliang Shou, Sunao Takatori | 1996-03-26 |
| 5500810 | Filter device with memory test circuit | Guoliang Shou, Weikang Yang, Sunao Takatori | 1996-03-19 |
| 5495192 | Sample hold circuit | Guoliang Shou, Weikang Yang, Sunao Takatori | 1996-02-27 |
| 5490099 | Method of multiplying an analog value by a digital value | Guoliang Shou, Weikang Yang, Sunao Takatori | 1996-02-06 |
| 5485597 | A CCD array memory device achieving high speed accessing by writing and reading data through a cache memory | — | 1996-01-16 |
| 5477483 | Memory device | Guoliang Shou, Sunao Takatori | 1995-12-19 |
| 5471161 | Circuit for calculating the minimum value | Guoliang Shou, Weikang Yang, Wiwat Wongwarawipat, Sunao Takatori | 1995-11-28 |
| 5469102 | Capacitive coupled summing circuit with signed output | Guoliang Shou, Weikang Yang, Sunao Takatori | 1995-11-21 |
| 5467376 | Incrementing and decrementing counter circuits | Guoliang Shou, Sunao Takatori | 1995-11-14 |
| 5467030 | Circuit for calculating a maximum value | Guoliang Shou, Weikang Yang, Wiwat Wongwarawipat, Sunao Takatori | 1995-11-14 |
| 5465064 | Weighted summing circuit | Guoliang Shou, Weikang Yang, Sunao Takatori | 1995-11-07 |
| 5463717 | Inductively coupled neural network | Sunao Takatori, Ryohei Kumagai, Koji Matsumoto | 1995-10-31 |
| 5457417 | Scaler circuit | Shou Guoliang, Weikang Yang, Sunao Takatori | 1995-10-10 |
| 5455581 | Digital-to-analog converter employing a common trigger and reference signal | Guoliang Shou, Weikang Yang, Sunao Takatori | 1995-10-03 |
| 5453711 | Weighted summing circuit | — | 1995-09-26 |
| 5452373 | Image verification method | Guoliang Shou, Sunao Takatori | 1995-09-19 |
| 5452336 | Memory device for recording a time factor | Guoliang Shou, Weikang Yang, Sunao Takatori | 1995-09-19 |
| 5450023 | Interface circuit using a limited number of pins in LSI applications | Weikang Yang, Guoliang Shou, Sunao Takatori | 1995-09-12 |