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Processing device for handling misaligned data |
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Processing system with a main processor pipeline and a co-processor pipeline |
Henk Muller |
2022-02-22 |
| 8966488 |
Synchronising groups of threads with dedicated hardware logic |
Michael David May, Alastair Dixon |
2015-02-24 |
| 8347312 |
Thread communications |
Michael David May, Alastair Dixon |
2013-01-01 |
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Scheduling thread upon ready signal set when port transfers data on trigger time activation |
Michael David May, Alastair Dixon |
2009-11-10 |
| 7613909 |
Resuming thread to service ready port transferring data externally at different clock rate than internal circuitry of a processor |
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2009-11-03 |
| 7216342 |
Code generation |
Trefor Southwell |
2007-05-08 |
| 7062634 |
Processor and a method for handling and encoding no-operation instructions |
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2006-06-13 |
| 6959363 |
Cache memory operation |
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2005-10-25 |
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Evaluation and optimization of code |
Trefor Southwell, Kristen Jacobs |
2005-04-19 |