Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7529449 | Substrate, device and method for forming a guidance structure in the substrate, and positioning method | Masaki Kobayashi, Toshimichi Iwamori | 2009-05-05 |
| 7490985 | Semiconductor integrated circuit arrangement device and method | Tomoki Umezawa | 2009-02-17 |
| 7260284 | Semiconductor integrated circuit and semiconductor integrated circuit arrangement device and process | Toshimichi Iwamori | 2007-08-21 |
| 6436793 | Methods of forming semiconductor structure | Gary A. Kneezel, Daniel E. Kuhman, Ackerman C. John, Almon P. Fisher, Allan F. Camp +1 more | 2002-08-20 |
| 6255133 | Electro optical devices with reduced filter thinning on the edge pixel photosites and method of producing same | Josef E. Jedlicka, Thomas Grimsley, Paul A. Hosier | 2001-07-03 |
| 6222180 | Electro optical devices with reduced filter thinning on the edge pixel photosites and method of producing same | Josef E. Jedlicka, Thomas Grimsley | 2001-04-24 |
| 6201293 | Electro optical devices with reduced filter thinning on the edge pixel photosites and method of producing same | Josef E. Jedlicka, Thomas Grimsley, Paul A. Hosier | 2001-03-13 |
| 6198093 | Electro optical devices with reduced filter thinning on the edge pixel photosites and method of producing same | Josef E. Jedlicka, Thomas Grimsley | 2001-03-06 |
| 6165813 | Replacing semiconductor chips in a full-width chip array | Kraig A. Quinn, Josef E. Jedlicka | 2000-12-26 |
| 5808297 | Reflective test patches for translucent color filters in photosensitive semiconductor chips | Josef E. Jedlicka | 1998-09-15 |
| 5753959 | Replacing semiconductor chips in a full-width chip array | Kraig A. Quinn, Josef E. Jedlicka | 1998-05-19 |
| 5706176 | Butted chip array with beveled chips | Kraig A. Quinn | 1998-01-06 |
| 5696626 | Photosensitive silicon chip having a ridge near an end photosite | Paul A. Hosier, Jagdish C. Tandon, Josef E. Jedlicka | 1997-12-09 |
| 5604362 | Filter architecture for a photosensitive chip | Josef E. Jedlicka, Debra S. Vent | 1997-02-18 |
| 5545913 | Assembly for mounting semiconductor chips in a full-width-array image scanner | Kraig A. Quinn, Josef E. Jedlicka | 1996-08-13 |
| 5530278 | Semiconductor chip having a dam to prevent contamination of photosensitive structures thereon | Josef E. Jedicka | 1996-06-25 |
| 5521125 | Precision dicing of silicon chips from a wafer | Josef E. Jedlicka | 1996-05-28 |
| 5219796 | Method of fabricating image sensor dies and the like for use in assembling arrays | Kraig A. Quinn, Josef E. Jedlicka | 1993-06-15 |
| 5128282 | Process for separating image sensor dies and the like from a wafer that minimizes silicon waste | Kraig A. Quinn, Paul A. Hosier, Josef E. Jedlicka | 1992-07-07 |