DP

Deepak Panwar

WT Western Digital Technologies: 2 patents #1,273 of 3,180Top 45%
CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
Overall (All Time): #1,392,764 of 4,157,543Top 35%
3
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11656876 Removal of dependent instructions from an execution pipeline Robert T. Golla 2023-05-23
11119149 Debug command execution using existing datapath circuitry Muhammad Tauseef Rab, Robert T. Golla, Matthew B. Smittle 2021-09-14
10901747 Unified store buffer Muhammad Tauseef Rab 2021-01-26