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Robert D. Becker — 16 Patents

WLWang Laboratories: 6 patents #16 of 284Top 6%
Oracle: 4 patents #3,163 of 14,854Top 25%
AAAdc Acquisition: 3 patents #3 of 12Top 25%
Chesterfield, MO: #334 of 6,461 inventorsTop 6%
Missouri: #1,118 of 23,789 inventorsTop 5%
Overall (All Time): #284,196 of 4,157,543Top 7%
16 Patents All Time
Robert D. Becker has been granted 16 US patents while listed as an inventor at Wang Laboratories. The first was granted in 1990 and the most recent in June 2025. Robert D. Becker ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list Robert D. Becker in Chesterfield, MO, US.

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
D1077936 Construction set element — 2025-06-03
D1011440 Construction set element — 2024-01-16
D762757 Shear pin Robert J. Langone, Kurt J. Kimball 2016-08-02
D762758 Shear pin Robert J. Langone, Kurt J. Kimball 2016-08-02
8947847 Methods for forming a structure having a lightning strike protection Robert J. Langone 2015-02-03
5941180 Calculator mount — 1999-08-24
5426750 Translation lookaside buffer apparatus and method with input/output entries, page table entries and page table pointers Peter A. Mehring 1995-06-20 $21,378,000
5379379 Memory control unit with selective execution of queued read and write requests Martin J. Schwartz, Kevin H. Curcuru, Kenneth J. Eng 1995-01-03 $4,133,000
5305444 Apparatus for increasing the number of hits in a translation lookaside buffer including instruction address lookaside register Peter A. Mehring 1994-04-19 $5,929,000
5265236 Method and apparatus for increasing the speed of memory access in a virtual memory system having fast page mode Peter A. Mehring, Varoujan Garapetian 1993-11-23 $8,036,000
5235684 System bus having multiplexed command/ID and data Martin J. Schwartz, Kevin H. Curcuru 1993-08-10
5222222 Apparatus and method for a space saving translation lookaside buffer for content addressable memory Peter A. Mehring 1993-06-22 $29,425,000
5097409 Multi-processor system with cache memories Martin J. Schwartz 1992-03-17
5034880 Apparatus and method for executing a conditional branch instruction Anthony S. Fong, Martin J. Schwartz, Janis Delmonte 1991-07-23
4943966 Memory diagnostic apparatus and method Richard GIUNTA, Martin J. Schwartz, Richard W. Coyle, Kevin H. Curcuru 1990-07-24
4939641 Multi-processor system with cache memories Martin J. Schwartz 1990-07-03

Nearby-Ranked Inventors

Chung-Lin Fu16
Tyrone T. Chen16
Shivendra Katiyar16
Kevin E. Kalajan16
Henry Y. Mark16
Marco Becker16
Nak Gi Sung16
Kenta Iwai16
Brock Mammoser16