| 6784945 |
System and method for providing fast acquire time tuning of multiple signals to present multiple simultaneous images |
Stanley V. Birleson, Douglas J. Bartek |
2004-08-31 |
| 6144402 |
Internet transaction acceleration |
Jay A. Thompson |
2000-11-07 |
| 5748127 |
Two cascoded transistor chains biasing DAC current cells |
Jaideep Prakash, Bruce A. Doyle |
1998-05-05 |
| 5539405 |
DAC achieving monotonicity with equal sources and shift array therefor |
— |
1996-07-23 |
| 5276856 |
Memory controller flexible timing control system and method |
David T. Stoner, Michael K. Corry |
1994-01-04 |
| 5241642 |
Image memory controller for controlling multiple memories and method of operation |
David T. Stoner, Michael K. Corry, David Pfeiffer |
1993-08-31 |
| 5146592 |
High speed image processing computer with overlapping windows-div |
David Pfeiffer, David T. Stoner, Dwight D. Dipert, Jay A. Thompson, James A. Fontaine +1 more |
1992-09-08 |
| 5129060 |
High speed image processing computer |
David Pfeiffer, David T. Stoner, Dwight D. Dipert, Jay A. Thompson, James A. Fontaine +1 more |
1992-07-07 |
| 5109348 |
High speed image processing computer |
David Pfeiffer, David T. Stoner, Dwight D. Dipert, Jay A. Thompson, James A. Fontaine +1 more |
1992-04-28 |
| 4985848 |
High speed image processing system using separate data processor and address generator |
David Pfeiffer, David T. Stoner, Dwight D. Dipert, Jay A. Thompson, James A. Fontaine +1 more |
1991-01-15 |
| 4955024 |
High speed image processing computer with error correction and logging |
David Pfeiffer, David T. Stoner, Dwight D. Dipert, Jay A. Thompson, James A. Fontaine +1 more |
1990-09-04 |
| 4605870 |
High speed low power current controlled gate circuit |
Allan H. Dansky |
1986-08-12 |
| 4585953 |
Low power off-chip driver circuit |
Gene J. Gaudenzi, Nghia V. Phan, Dennis C. Reedy |
1986-04-29 |
| 4531067 |
Push-pull Darlington current sink (PPDCS) logic circuit |
Dennis C. Banker, Frank A. Montegari |
1985-07-23 |
