DC

David Van Campenhout

VD Verisity Design: 1 patents #5 of 7Top 75%
📍 San Jose, CA: #17,604 of 32,062 inventorsTop 55%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #2,059,534 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
8856700 Methods, systems, and apparatus for reliability synthesis Yosinori Watanabe, Walter J. Ghijsen, Michael Meyer, Michael T. McNamara 2014-10-07
6502232 Electronic circuit design environmentally constrained test generation system 2002-12-31