Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Michael N. Michael — 11 Patents

VSVentana Micro Systems: 11 patents #3 of 6Top 50%
Folsom, CA: #220 of 1,500 inventorsTop 15%
California: #56,011 of 386,348 inventorsTop 15%
Overall (All Time): #435,149 of 4,157,543Top 15%
11 Patents All Time
Michael N. Michael has been granted 11 US patents while listed as an inventor at Ventana Micro Systems. The first was granted in 2023 and the most recent in May 2025. Michael N. Michael ranks #435,149 of 4,157,543 US inventors in our database (top 10.5%). Patent records list Michael N. Michael in Folsom, CA, US.

Patents per Year

Patents granted per year, 2023 to 2025Bar chart with a peak of 6 patents in 2024.peak 62023: 2 patents20232024: 6 patents20242025: 3 patents2025

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDate
12299449 Performance and power efficient processor when switching between fetching from decoded and non-decoded instruction sources John G. Favor 2025-05-13
12282430 Macro-op cache data entry pointers distributed as initial pointers held in tag array and next pointers held in data array for efficient and performant variable length macro-op cache entries John G. Favor 2025-04-22
12253951 Microprocessor with branch target buffer whose entries include fetch block hotness counters used for selective filtering of macro-op cache allocations John G. Favor 2025-03-18
12118360 Branch target buffer miss handling John G. Favor 2024-10-15
12106111 Prediction unit with first predictor that provides a hashed fetch address of a current fetch block to its own input and to a second predictor that uses it to predict the fetch address of a next fetch block John G. Favor 2024-10-01
12020032 Prediction unit that provides a fetch block descriptor each clock cycle John G. Favor 2024-06-25
12014180 Dynamically foldable and unfoldable instruction fetch pipeline John G. Favor, Vihar Soneji 2024-06-18
12014178 Folded instruction fetch pipeline John G. Favor, Vihar Soneji 2024-06-18
12008375 Branch target buffer that stores predicted set index and predicted way number of instruction cache John G. Favor, Vihar Soneji 2024-06-11
11836498 Single cycle predictor John G. Favor 2023-12-05
11816489 Microprocessor with prediction unit pipeline that provides a next fetch address at a rate of one per clock cycle John G. Favor 2023-11-14