Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9490360 | Semiconductor device and operating method thereof | Ming-Shing Chen, Ming-Hui Chang, Wei-Ting Wu, Ying-Chou Lai, Chorng-Lih Young +1 more | 2016-11-08 |
| 6429135 | Method of reducing stress between a nitride silicon spacer and a substrate | Kun-Chi Lin | 2002-08-06 |
| 6403411 | Method for manufacturing lower electrode of DRAM capacitor | Chih-Hsun Chu, Kevin Lin, Kuo-Tai Huang, Wen-Yi Hsieh, Tri-Rung Yew | 2002-06-11 |
| 6303435 | Method of fabricating a wide-based box-structured capacitor containing hemi-spherical grains | — | 2001-10-16 |
| 6255229 | Method for forming semiconductor dielectric layer | Kevin Lin, Kun-Chi Lin | 2001-07-03 |
| 6238974 | Method of forming DRAM capacitors with a native oxide etch-stop | Kevin Lin, Kun-Chi Lin | 2001-05-29 |
| 6211086 | Method of avoiding CMP caused residue on wafer edge uncompleted field | Tzung-Han Lee | 2001-04-03 |
| 6211021 | Method for forming a borderless contact | Chuan-Fu Wang | 2001-04-03 |
| 6177310 | Method for forming capacitor of memory cell | Kuen-Yow Lin | 2001-01-23 |
| 6159806 | Method for increasing the effective spacer width | Hsi-Chia Lin, Kun-Chi Lin | 2000-12-12 |
| 6140202 | Method of fabricating double-cylinder capacitor | Kun-Chi Lin | 2000-10-31 |
| 6124161 | Method for fabricating a hemispherical silicon grain layer | Kevin Lin, Kun-Chi Lin | 2000-09-26 |
| 6100158 | Method of manufacturing an alignment mark with an etched back dielectric layer and a transparent dielectric layer and a device region on a higher plane with a wiring layer and an isolation region | Tzung-Han Lee, Kun-Chi Lin, Alex Hou | 2000-08-08 |
| 6063660 | Fabricating method of stacked type capacitor | Hua-Chou Tseng, Tony Lin | 2000-05-16 |
| 6040241 | Method of avoiding sidewall residue in forming connections | Tzung-Han Lee | 2000-03-21 |
| 5981336 | Process for forming double-layer crown capacitor | — | 1999-11-09 |
| 5963811 | Method of fabricating a MOS device with a localized punchthrough stopper | — | 1999-10-05 |