Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10483235 | Stacked electronic device and method for fabricating the same | Yu-Cheng Chiao, Tung-Yi Chan, Chia-Hua Ho, Meng-Chang Chan, Hsin-Hung Chou | 2019-11-19 |
| 9881901 | Stacked package device and method for fabricating the same | Yu-Cheng Chiao, Tung-Yi Chan, Chia-Hua Ho, Meng-Chang Chan, Hsin-Hung Chou | 2018-01-30 |
| 6026028 | Hot carrier injection programming and negative gate voltage channel erase flash EEPROM structure | Chih-Ming Chen, Ling-Sung Wang, Horng-Ming Lee, Ko-Hsing Chang | 2000-02-15 |
| 5668065 | Process for simultaneous formation of silicide-based self-aligned contacts and local interconnects | — | 1997-09-16 |
| 5476800 | Method for formation of a buried layer for a semiconductor device | Gregory N. Burton, Chi-Kwan Lau | 1995-12-19 |
| 5219304 | Electrical plug | — | 1993-06-15 |
| 5158900 | Method of separately fabricating a base/emitter structure of a BiCMOS device | Chi-Kwan Lau, Donald L. Packwood, Ashor Kapoor | 1992-10-27 |
| 5108542 | Selective etching method for tungsten and tungsten alloys | — | 1992-04-28 |