PP

Paul L. Peirson

UN Unisys: 2 patents #632 of 2,015Top 35%
📍 Forest Lake, MN: #141 of 310 inventorsTop 50%
🗺 Minnesota: #23,881 of 52,454 inventorsTop 50%
Overall (All Time): #2,314,088 of 4,157,543Top 60%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
4989210 Pipelined address check bit stack controller James H. Scheuneman, Michael E. Mayer 1991-01-29
4918695 Failure detection for partial write operations for memories James H. Scheuneman, Michael E. Mayer 1990-04-17