Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11385872 | Extending a virtual machine instruction set architecture | Maurizio Cimadamore, Brian Goetz | 2022-07-12 |
| 10853096 | Container-based language runtime loading an isolated method | John R. Rose, Brian Goetz | 2020-12-01 |
| 10802802 | Extending a virtual machine instruction set architecture | Maurizio Cimadamore, Brian Goetz | 2020-10-13 |
| 10719337 | Container-based language runtime loading an isolated method | John R. Rose, Brian Goetz | 2020-07-21 |
| 10606614 | Container-based language runtime using a variable-sized container for an isolated method | John R. Rose, Brian Goetz | 2020-03-31 |
| 10175998 | Container-based language runtime loading an isolated method | John R. Rose, Brian Goetz | 2019-01-08 |
| 10055208 | Extending a virtual machine instruction set architecture | Maurizio Cimadamore, Brian Goetz | 2018-08-21 |
| 9836288 | Eager and optimistic evaluation of promises | Lukas Stadler, Thomas Wuerthinger, Gero Leinemann | 2017-12-05 |
| 8943290 | Automatic management of heterogeneous memory resources | Douglas Norman Simon, Thomas Wuerthinger | 2015-01-27 |
| 6594785 | System and method for fault handling and recovery in a multi-processing system having hardware resources shared between multiple partitions | Roger L. Gilbertson, Mitchell A. Bauman, Penny L. Svenkeson, James L. DePenning, Donald R. Kalvestrand +3 more | 2003-07-15 |
| 6434641 | System for reducing the number of requests presented to a main memory in a memory storage system employing a directory-based caching scheme | Mitchell A. Bauman | 2002-08-13 |
| 6334159 | Method and apparatus for scheduling requests within a data processing system | — | 2001-12-25 |
| 6263409 | Data processing system and method for substituting one type of request for another for increased performance when processing back-to-back requests of certain types | Eugene A. Rodi | 2001-07-17 |
| 6189078 | System and method for increasing data transfer throughput for cache purge transactions using multiple data response indicators to maintain processor consistency | Mitchell A. Bauman | 2001-02-13 |
| 6167489 | System and method for bypassing supervisory memory intervention for data transfers between devices having local memories | Mitchell A. Bauman, Roger L. Gilbertson | 2000-12-26 |
| 5717942 | Reset for independent partitions within a computer system | Doug Fuller, Lewis A. Boone | 1998-02-10 |
| 5625892 | Dynamic power regulator for controlling memory power consumption | Mitchell A. Bauman | 1997-04-29 |
| 5603005 | Cache coherency scheme for XBAR storage structure with delayed invalidates until associated write request is executed | Mitchell A. Bauman | 1997-02-11 |
| 5423016 | Block buffer for instruction/operand caches | Kenichi Tsuchiya, Lewis A. Boone, Thomas Adelmeyer | 1995-06-06 |