Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12014767 | Double data rate (DDR) memory controller apparatus and method | David Wu, Venkat Iyer | 2024-06-18 |
| 11710516 | Double data rate (DDR) memory controller apparatus and method | David Wu, Venkat Iyer | 2023-07-25 |
| 11348632 | Double data rate (DDR) memory controller apparatus and method | David Wu, Venkat Iyer | 2022-05-31 |
| 10734061 | Double data rate (DDR) memory controller apparatus and method | David Wu, Venkat Iyer | 2020-08-04 |
| 10586585 | Double data rate (DDR) memory controller apparatus and method | David Wu, Venkat Iyer | 2020-03-10 |
| 10269408 | Double data rate (DDR) memory controller apparatus and method | David Wu, Venkat Iyer | 2019-04-23 |
| 10242730 | Double data rate (DDR) memory controller apparatus and method | David Wu, Venkat Iyer | 2019-03-26 |
| 10229729 | Method for calibrating capturing read data in a read data path for a DDR memory interface circuit | David Wu, Venkat Iyer | 2019-03-12 |
| 10032502 | Method for calibrating capturing read data in a read data path for a DDR memory interface circuit | David Wu, Venkat Iyer | 2018-07-24 |
| 9805784 | Multiple gating modes and half-frequency dynamic calibration for DDR memory controllers | David Wu, Venkat Iyer | 2017-10-31 |
| 9584309 | Circuit for dynamically adaptive bit-leveling by incremental sampling, jitter detection, and exception handling | — | 2017-02-28 |
| 9431091 | Multiple gating modes and half-frequency dynamic calibration for DDR memory controllers | David Wu, Venkat Iyer | 2016-08-30 |
| 9300443 | Methods for dynamically adaptive bit-leveling by incremental sampling, jitter detection, and exception handling | — | 2016-03-29 |
| 8661356 | Time application having an intergrated check engine | Hilmar Demant, Vinod S. Nair, Jayakanth R, Aaby Sivakumar, Abdul Aziz +4 more | 2014-02-25 |
| 7975164 | DDR memory controller | Jung-Pil Lee | 2011-07-05 |
| 7877581 | Networked processor for a pipeline architecture | Shridhar Mukund, Neeraj Kashalkar | 2011-01-25 |
| 7571258 | Method and apparatus for a pipeline architecture | Shridhar Mukund, Anjan Mitra | 2009-08-04 |
| 7320013 | Method and apparatus for aligning operands for a processor | Shridhar Mukund, Neeraj Kashalkar | 2008-01-15 |