Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Thomas Anton Leyrer — 26 Patents

TITexas Instruments: 26 patents #409 of 12,488Top 4%
Geisenhausen, DE: #1 of 25 inventorsTop 4%
Overall (All Time): #150,017 of 4,157,543Top 4%
26 Patents All Time
Thomas Anton Leyrer has been granted 26 US patents while listed as an inventor at Texas Instruments. The first was granted in 1997 and the most recent in October 2024. Thomas Anton Leyrer ranks #150,017 of 4,157,543 US inventors in our database (top 3.6%). Patent records list Thomas Anton Leyrer in Geisenhausen, DE.

Patents per Year

Patents granted per year, 1997 to 2024Bar chart with a peak of 6 patents in 2022.peak 61997: 1 patents19971998: 1 patents1999: 1 patents19992004: 1 patents2005: 1 patents20052012: 1 patents2019: 2 patents20192020: 2 patents2021: 3 patents20212022: 6 patents2023: 2 patents20232024: 5 patents2024

Issued Patents All Time

Showing 1–25 of 26 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12113612 Apparatus and mechanism to support multiple time domains in a single SoC for time sensitive network Chunhua Hu, Venkateswar Reddy Kowkutla, Eric Hansen, Denis Beaudoin 2024-10-08 $65,117,000
12086632 Real-time context specific task manager for multi-core communication and control system William Cronin Wallace 2024-09-10 $30,309,000
12040885 Open real-time ethernet protocol Thomas Mauer 2024-07-16 $57,907,000
11966777 Level two first-in-first-out transmission William Cronin Wallace, David Alston Lide 2024-04-23 $78,074,000
11875183 Real-time arbitration of shared resources in a multi-master communication and control system William Cronin Wallace 2024-01-16 $22,928,000
11704154 High-speed broadside communications and control system William Cronin Wallace, Pratheesh Gangadhar Thalakkal Kottilaveedu, David Alston Lide 2023-07-18 $32,780,000
11579877 Broadside random access memory for low cycle memory access and additional functions William Cronin Wallace, David Alston Lide, Pratheesh Gangadhar Thalakkal Kottilaveedu 2023-02-14 $35,706,000
11405121 Apparatus and mechanism to support multiple time domains in a single SoC for time sensitive network Chunhua Hu, Venkateswar Reddy Kowkutla, Eric Hansen, Denis Beaudoin 2022-08-02 $48,040,000
11343205 Real-time, time aware, dynamic, context aware and reconfigurable ethernet packet classification William Cronin Wallace, Pratheesh Gangadhar Thalakkal Kottilaveedu 2022-05-24 $26,186,000
11336757 Sample based data transmission over low-level communication channel Peter Aberl 2022-05-17 $43,311,000
11290099 Managing pulse-width modulation trip signals from multiple sources Martin Staebler, William Cronin Wallace 2022-03-29 $49,798,000
11281493 Real-time context specific task manager for multi-core communication and control system William Cronin Wallace 2022-03-22 $40,478,000
11243809 Level two first-in-first-out transmission William Cronin Wallace, David Alston Lide 2022-02-08 $67,398,000
11075707 Open real-time ethernet protocol Thomas Mauer 2021-07-27 $44,725,000
11048552 High-speed broadside communications and control system William Cronin Wallace, Pratheesh Gangadhar Thalakkal Kottilaveedu, David Alston Lide 2021-06-29 $28,332,000
10970074 Broadside random access memory for low cycle memory access and additional functions William Cronin Wallace, David Alston Lide, Pratheesh Gangadhar Thalakkal K{dot over (o)}ttilaveedu 2021-04-06 $51,885,000
10871992 Level two first-in-first-out transmission William Cronin Wallace, David Alston Lide 2020-12-22 $43,063,000
10812060 Managing pulse-width modulation trip signals from multiple sources Martin Staebler, William Cronin Wallace 2020-10-20 $20,699,000
10484119 Open real-time ethernet protocol Thomas Mauer 2019-11-19 $19,310,000
10396922 Apparatus and mechanism to support multiple time domains in a single soc for time sensitive network Chunhua Hu, Venkateswar Reddy Kowkutla, Eric Hansen, Denis Beaudoin 2019-08-27 $25,477,000
8130791 Receiver and method for processing a stream of data packets when an error occurred on the physical layer Krzysztof Chruscinski 2012-03-06 $7,446,000
6948013 Apparatus and method for configuring data cells 2005-09-20 $17,623,000
6707902 Method of resynchronizing data transfer between two modems connected by a dedicated line Umashankar Iyer, Sharmila Kannangara 2004-03-16 $22,720,000
5860027 System for receiving burst width greater than cache width by storing first portion of burst to cache and storing second portion of burst to storage circuit Steven D. Sabin 1999-01-12 $31,347,000
5729713 Data processing with first level cache bypassing after a data transfer becomes excessively long 1998-03-17 $17,390,000