Issued Patents All Time
Showing 76–100 of 865 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11175339 | IC analog boundary scan cell, digital cell, comparator, analog switches | — | 2021-11-16 |
| 11150297 | Integrated circuit with JTAG port, tap linking module, and off-chip TAP interface port | — | 2021-10-19 |
| 11137448 | TAP,TCK inverter,shadow access port scan/instruction registers,state machine | — | 2021-10-05 |
| 11137447 | IC test architecture having differential data input and output buffers | — | 2021-10-05 |
| 11125818 | Test access mechanism controller including instruction register, instruction decode circuitry | — | 2021-09-21 |
| 11114137 | Bidirectional data pin, clock input pin, shift register, debug circuitry | — | 2021-09-07 |
| 11105852 | Test compression in a JTAG daisy-chain environment | — | 2021-08-31 |
| 11085963 | Switching FPI between FPI and RPI from received bit sequence | — | 2021-08-10 |
| 11079431 | Entering home state after soft reset signal after address match | — | 2021-08-03 |
| 11047912 | IC first/second surfaces contact points, test control port, parallel scan | — | 2021-06-29 |
| 11041903 | TAP gating scan enable output to decompressor and scan registers | — | 2021-06-22 |
| 10976365 | Serial data communication modes on TDI/TDO, receive TMS, send TMS | — | 2021-04-13 |
| 10969423 | Switch coupling functional circuitry to via, scan cell contacting via | — | 2021-04-06 |
| 10962589 | Stacked die interposer monitor trigger, address comparator, trigger controller circuitry | — | 2021-03-30 |
| 10948539 | Access ports, port selector with enable outputs, and TDI/TDO multiplexer | — | 2021-03-16 |
| 10935601 | First, second, and third bus leads, routing and control circuitry | — | 2021-03-02 |
| 10935591 | Two die sides with PTI. PTO. TDI, TCK, TMS, TDO, PTIO contact points method | — | 2021-03-02 |
| 10928445 | Boundary scan and wrapper circuitry with state machine and multiplexers | — | 2021-02-23 |
| 10928444 | Receiving test input message packets and transmitting modulated acknowledgement packets | — | 2021-02-23 |
| 10928419 | Interposer, Test Access Port, First and Second Through Silicon Vias | — | 2021-02-23 |
| 10901033 | Channel circuitry, tap linking module, scan tap, debug tap domains | — | 2021-01-26 |
| 10895598 | At-speed test access port operations | — | 2021-01-19 |
| 10884057 | 3D tap and scan port architectures | — | 2021-01-05 |
| 10845412 | IC receiving TDI addresses in R/TI after update-IR while TDI in second logic state | — | 2020-11-24 |
| 10845415 | TCK to shift register and decompressor on shift-DR and pause-DR | — | 2020-11-24 |