Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12493735 | Semiconductor void placement | Todd Snider, Srinivas S. Moola | 2025-12-09 |
| 12339298 | Method of CTLE estimation using channel step-response for transmitter link equalization test | Subhankar Ghose, Ankit Dash, David M. Bouse | 2025-06-24 |