Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406848 | Method of fabricating a gate cut feature for multi-gate semiconductor devices | Ming-Yuan Wu, Da-Wen Lin, Hsu-Chieh Cheng, Min Jiao | 2025-09-02 |
| 12243782 | Local gate height tuning by CMP and dummy gate design | Ming-Chang Wen, Chang-Yun Chang, Keng-Yao Chen, Chen-Yu Tai | 2025-03-04 |
| 12142608 | Semiconductor device and method for making the same | Pei-Yu Chou, Ting-Gang Chen, Tze-Liang Lee | 2024-11-12 |
| 12051735 | Dielectric spacer to prevent contacting shorting | Ting-Gang Chen, Tai-Chun Huang, Ming-Chang Wen, Shu-Yuan Ku, Fu-Kai Yang +2 more | 2024-07-30 |
| 11817354 | Local gate height tuning by cmp and dummy gate design | Ming-Chang Wen, Chang-Yun Chang, Keng-Yao Chen, Chen-Yu Tai | 2023-11-14 |
| 11652106 | Semiconductor device and method for making the same | Pei-Yu Chou, Ting-Gang Chen, Tze-Liang Lee | 2023-05-16 |
| 11508623 | Local gate height tuning by CMP and dummy gate design | Ming-Chang Wen, Chang-Yun Chang, Keng-Yao Chen, Chen-Yu Tai | 2022-11-22 |
| 11342444 | Dielectric spacer to prevent contacting shorting | Ting-Gang Chen, Tai-Chun Huang, Ming-Chang Wen, Shu-Yuan Ku, Fu-Kai Yang +2 more | 2022-05-24 |
| 11107902 | Dielectric spacer to prevent contacting shorting | Ting-Gang Chen, Tai-Chun Huang, Ming-Chang Wen, Shu-Yuan Ku, Fu-Kai Yang +2 more | 2021-08-31 |