Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12393762 | Method for generating a layout diagram of a semiconductor device including power-grid- adapted route-spacing | Li-Chun Tien, Shun Li Chen, Ting-Wei Chiang, Ting Yu Chen | 2025-08-19 |
| 12288786 | Shared well structure manufacturing method | Yang Zhou, Liu HAN, Qingchao Meng, ZeJian Cai | 2025-04-29 |
| 12272658 | Method of making electrostatic discharge protection cell and antenna integrated with through silicon via | HoChe Yu, Fong-Yuan Chang, Chih-Liang Chen, Tzu-Heng Chang | 2025-04-08 |
| 12271678 | Integrated circuit with constrained metal line arrangement, method of using, and system for using | Qiquan Wang, Li-Chun Tien, Yuan Ma | 2025-04-08 |
| 12199037 | Standard and engineering change order (ECO) cell regions and semiconductor device including the same | Li-Chun Tien, Shun Li Chen, Ting-Wei Chiang, Ting Yu Chen | 2025-01-14 |
| 12080658 | Integrated circuit device with antenna effect protection circuit and method of manufacturing | CunCun CHEN, Yaqi MA, Lei Pan, MingJian WANG, JiaLiang ZHONG | 2024-09-03 |
| 11942441 | Electrostatic discharge protection cell and antenna integrated with through silicon via | HoChe Yu, Fong-Yuan Chang, Chih-Liang Chen, Tzu-Heng Chang | 2024-03-26 |
| 11876088 | Shared well structure, layout, and method | Yang Zhou, Liu HAN, Qingchao Meng, ZeJian Cai | 2024-01-16 |
| 11817350 | Method for manufacturing standard cell regions and engineering change order (ECO) cell regions | Li-Chun Tien, Shun Li Chen, Ting-Wei Chiang, Ting Yu Chen | 2023-11-14 |
| 11748550 | Integrated circuit with constrained metal line arrangement | Qiquan Wang, Li-Chun Tien, Yuan Ma | 2023-09-05 |
| 11704472 | Standard cells and variations thereof within a standard cell library | Sheng-Hsiung Chen, Jerry Chang Jui Kao, Fong-Yuan Chang, Po-Hsiang Huang, Shao-Huan Wang +2 more | 2023-07-18 |
| 11182529 | Semiconductor device including power-grid-adapted route-spacing and method for generating layout diagram of same | Li-Chun Tien, Ting-Wei Chiang, Shun Li Chen, Ting Yu Chen | 2021-11-23 |
| 11182533 | Standard cells and variations thereof within a standard cell library | Sheng-Hsiung Chen, Jerry Chang Jui Kao, Fong-Yuan Chang, Po-Hsiang Huang, Shao-Huan Wang +2 more | 2021-11-23 |
| 11030382 | Integrated circuit with constrained metal line arrangement | Li-Chun Tien, Yuan Ma, Qiquan Wang | 2021-06-08 |
| 11030373 | System for generating standard cell layout having engineering change order (ECO) cells | Li-Chun Tien, Ting-Wei Chiang, Shun Li Chen, Ting Yu Chen | 2021-06-08 |
| 10741539 | Standard cells and variations thereof within a standard cell library | Sheng-Hsiung Chen, Jerry Chang Jui Kao, Fong-Yuan Chang, Po-Hsiang Huang, Shao-Huan Wang +2 more | 2020-08-11 |
| 10565345 | Semiconductor device having engineering change order (ECO) cells | Li-Chun Tien, Ting-Wei Chiang, Shun Li Chen, Ting Yu Chen | 2020-02-18 |
| 10339250 | Method of generating engineering change order (ECO) layout of base cell and computer-readable medium comprising executable instructions for carrying out said method | Li-Chun Tien, Ting-Wei Chiang, Shun Li Chen, Ting Yu Chen | 2019-07-02 |
| 10231152 | Network handover method, device, and system | Xiaobo Wu, Hai Liu, Daliang Zhang | 2019-03-12 |
| 10212634 | Communication method, device, and system | Xiaobo Wu, Guangwei Wang, Guobao Xi, Chao Sun | 2019-02-19 |
| 9900807 | Circuit switched fallback method and device | Xiaobo Wu, Hai Liu, Daliang Zhang, Yaowei Han | 2018-02-20 |
| 9894582 | Congestion control implementation method and apparatus | Haopeng Zhu, Tao Jiang, Xiaobo Wu, Xiaoji Sun, Wei Tan | 2018-02-13 |