Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7244641 | Process sequence and mask layout to reduce junction leakage for a dual gate MOSFET device | — | 2007-07-17 |
| 7183150 | Resist protect oxide structure of sub-micron salicide process | Ming-Chang Hsieh, Hsun-Chih Tsao, Hung-Chih Tsai | 2007-02-27 |
| 7064371 | Low leakage one transistor static random access memory | Wen-Jye Yue, Hsien-Chin Peng | 2006-06-20 |
| 6852589 | Method to modify 0.25 μm 1T-RAM by extra resist protect oxide (RPO) blocking | Ching-Kwun Huang, Chih-Chang Chen, Hsien-Chih Peng | 2005-02-08 |
| 6849485 | Process sequence and mask layout to reduce junction leakage for a dual gate MOSFET device | — | 2005-02-01 |
| 6815274 | Resist protect oxide structure of sub-micron salicide process | Ming-Chang Hsieh, Hsun-Chih Tsao, Hung-Chih Tsai | 2004-11-09 |
| 6790724 | Low leakage one transistor static random access memory | Wen-Jye Yue, Hsien-Chin Peng | 2004-09-14 |
| 6528422 | Method to modify 0.25&mgr;m 1T-RAM by extra resist protect oxide (RPO) blocking | Ching-Kwun Huang, Chih-Chang Chen, Hsien-Chih Peng | 2003-03-04 |